Design Conductor 2.0: An agent builds a TurboQuant inference accelerator in 80 hours
2026-05-06 • Hardware Architecture
Hardware ArchitectureArtificial Intelligence
AI summaryⓘ
The authors improved their previous AI system called Design Conductor, which can design computer chips, making it much more powerful and able to handle tasks 80 times larger. They showcase four new chip designs created fully autonomously, including one called VerTQ, which speeds up AI calculations using a special method called TurboQuant. VerTQ was tested on an FPGA and shows efficient performance and size. The authors also discuss what changes made these improvements possible and analyze how the system uses its language processing tokens and its current limitations.
Design ConductorRISC-V CPULLM agentsTurboQuantFPGAFP16/32 unitsTSMC 16FFinference acceleratorpipelinetoken usage
Authors
The Verkor Team, Ravi Krishna, Suresh Krishna, David Chin
Abstract
Driven by a rapid co-evolution of both harness and underlying models, LLM agents are improving at a dizzying pace. In our prior work (performed in Dec. 2025), we introduced "Design Conductor" (or just "Conductor"), a system capable of building a 5-stage Linux-capable RISC-V CPU in 12 hours. In this work, we introduce an updated multi-agent harness powered by frontier models released in April 2026, which is able to handle 80x larger tasks, at higher quality, fully autonomously. Following a brief introduction, we examine 4 designs that the system produced autonomously, including "VerTQ", an LLM inference accelerator which hard-wires support for TurboQuant in a 240-cycle pipeline, starting from the TurboQuant arXiv paper. VerTQ includes heavy compute processing, with 5129 FP16/32 units; the design was mapped to an FPGA at 125 MHz and consumes 5.7 mm^2 in TSMC 16FF (8 attention pipes). We review the key new characteristics that enabled these results. Finally, we analyze Design Conductor's token usage and other empirical characteristics, including its limitations.